DESIGN OF LOW POWER HIGH SPEED DOUBLE TAIL COMPARATOR WITH 45NM TECHNOLOGY FOR ADC APPLICATION

Author(s)

Dwip Narayan Mukherjee1*, Saradindu Panda2, Bansibadan Maji3

Author affiliation

1Department of Electronics & Communication Engineering, Bankura Unnayani Institute Engineering, Bankura, India
2Department of Electronics & Communication Engineering, Narula Institute of Technology, Kolkata, India
3Department of Electronics & Communication Engineering, National Institute of Technology, Durgapur, India

Abstract

In the present scenario low power and high speed play a significant role specifically in the field of VLSI circuits. Comparator is one of the major parts of an analog to digital converter (ADC) that can improve the overall performance of Flash/Pipeline Analog to Digital Converter.The main objective of this paper is to design and implementation of different comparator and compared in terms of power consumption, propagation delay and transistor count. The results of this paper are simulated on the EDA tanner tool realized in 45-nanometer technology at 1v supply voltage. Simulation result shows that the proposed-2 comparator has low power dissipation of 8.63 microwatt with high speed of 3.41GHz.

Keywords

Comparator, Double-Tail Comparator, Analog to Digital Converter, Low power, High speed, Transistor Count, Tanner EDA